WP6-25 - Revision history

Grolleaue at 08:49, 10 March 2023

2023-03-10T08:49:28Z

← Older revision		Revision as of 08:49, 10 March 2023
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	\|-		\|-
	\| TRL \|\| 5-6		\| TRL \|\| 5-6
			\|-
			\| Contact \|\| evillar at teisa.unican.es
	\|}		\|}

Raulgv: /* Detailed Description */

2023-02-17T10:08:39Z

Detailed Description

← Older revision		Revision as of 10:08, 17 February 2023
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	9. SW Component Verification. S3D links each component with their Test-Benches so that the component can be verified both in the host (verification) and the target platform (testing) in case it has been decided already and it is available.		9. SW Component Verification. S3D links each component with their Test-Benches so that the component can be verified both in the host (verification) and the target platform (testing) in case it has been decided already and it is available.

	~~10.~~ In the rest of stages:		In the rest of stages:
	1. SW Integration & Verification.
	2. HW Integration & Verification.		10. SW Integration & Verification.
	~~3. IT~~ Integration & Verification.
	4. ~~Mechanical~~ Integration & Verification.		11. HW Integration & Verification.
	5. System Integration & Verification.
	6. System Acceptance Verification.		12 Mechanical Integration & Verification.

			13. IT Integration & Verification.

			14. System Integration & Verification.

			15. System Acceptance Verification.

	S3D helps in supporting the improvement of the model through the different stages and the automatic generation of the executables models so that the functional and non-functional constraints can be verified. Architectural mapping, that is, the final mapping of functional components in the PIM to execution resources in the PDM is fixed during System Integration and Verification when an accurate simulation and performance analysis model including the actual code can be generated. This model can provide accurate metrics ensuring final satisfaction of the implementation decided after Design-Space Exploration of as many possibilities as required.		S3D helps in supporting the improvement of the model through the different stages and the automatic generation of the executables models so that the functional and non-functional constraints can be verified. Architectural mapping, that is, the final mapping of functional components in the PIM to execution resources in the PDM is fixed during System Integration and Verification when an accurate simulation and performance analysis model including the actual code can be generated. This model can provide accurate metrics ensuring final satisfaction of the implementation decided after Design-Space Exploration of as many possibilities as required.

Raulgv: /* Detailed Description */

2023-02-17T09:08:57Z

Detailed Description

← Older revision		Revision as of 09:08, 17 February 2023
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	In all these stages, S3D supports reusability from previous projects as both functional and test-bench components can be imported from libraries:		In all these stages, S3D supports reusability from previous projects as both functional and test-bench components can be imported from libraries:

	# System Requirement Analysis. Based on Papyrus and the UML/MARTE standard, S3D can help in analysing and finally, specify the functional and non-functional requirements to be satisfied by the System (or System of Systems),		1. System Requirement Analysis. Based on Papyrus and the UML/MARTE standard, S3D can help in analysing and finally, specify the functional and non-functional requirements to be satisfied by the System (or System of Systems).
	# System Design. Once the requirements have been specified, the system and its environment are fully specified in terms of the interface among them, the domain constraints (input rates, types and constraints among them) and the system functional and non-functional requirements (output rates, input/output delays, energy, etc.). As part of the System Design stage, partitioning of the system in the mechanical and the IT (digital) parts is performed. In S3D, the mechanical part will be incorporated to the Test-Bench (TB) of the (digital) system. As its functionality and performance is fully specified, the TB, including the model of the robots, can be developed.
	# Mechanical Analysis and Design. The inclusion of the robots as TB components allows the analysis of their constraints and the design of the mechanical part (number and type of robots, design requirements to each one and among them, etc.).		2. System Design. Once the requirements have been specified, the system and its environment are fully specified in terms of the interface among them, the domain constraints (input rates, types and constraints among them) and the system functional and non-functional requirements (output rates, input/output delays, energy, etc.). As part of the System Design stage, partitioning of the system in the mechanical and the IT (digital) parts is performed. In S3D, the mechanical part will be incorporated to the Test-Bench (TB) of the (digital) system. As its functionality and performance is fully specified, the TB, including the model of the robots, can be developed.
	# IT Analysis and Design. At this stage, the analysis and specification of the Platform-Description Model (PDM) can be performed. On the other side, the Platform-Independent Model can be specified.
	# HW Analysis & Design. At this stage, the design of the initial Platform-Description Model (PDM), can be performed and an initial architecture of nodes and their internal HW architecture can be proposed. The final PDM will be decided later during architectural mapping as part of the System Integration & Verification stage.		3. Mechanical Analysis and Design. The inclusion of the robots as TB components allows the analysis of their constraints and the design of the mechanical part (number and type of robots, design requirements to each one and among them, etc.).
	# SW Analysis & Design and SW Detailed Design. During this stages, the hierarchical partitioning of the PIM in sub-systems and finally, components fully specified in their interfaces and functional and non-functional constraints, is decided.
	# SW Development. The goal of this stage is to develop the code implementing the functional constraints. Papyrus supports both the Modelling and the Development Views and S3D links one with the other by annotating the components with their implementation files using the file’s paths as properties.		4. IT Analysis and Design. At this stage, the analysis and specification of the Platform-Description Model (PDM) can be performed. On the other side, the Platform-Independent Model can be specified.
	# SW Component Verification. S3D links each component with their Test-Benches so that the component can be verified both in the host (verification) and the target platform (testing) in case it has been decided already and it is available.
	# In the rest of stages:		5&7. SW Analysis & Design and SW Detailed Design. During this stages, the hierarchical partitioning of the PIM in sub-systems and finally, components fully specified in their interfaces and functional and non-functional constraints, is decided.
	## SW Integration & Verification.
	## HW Integration & Verification.		6. HW Analysis & Design. At this stage, the design of the initial Platform-Description Model (PDM), can be performed and an initial architecture of nodes and their internal HW architecture can be proposed. The final PDM will be decided later during architectural mapping as part of the System Integration & Verification stage.
	## IT Integration & Verification.
	## Mechanical Integration & Verification.		8. SW Development. The goal of this stage is to develop the code implementing the functional constraints. Papyrus supports both the Modelling and the Development Views and S3D links one with the other by annotating the components with their implementation files using the file’s paths as properties.
	## System Integration & Verification.
	## System Acceptance Verification.		9. SW Component Verification. S3D links each component with their Test-Benches so that the component can be verified both in the host (verification) and the target platform (testing) in case it has been decided already and it is available.

			10. In the rest of stages:
			1. SW Integration & Verification.
			2. HW Integration & Verification.
			3. IT Integration & Verification.
			4. Mechanical Integration & Verification.
			5. System Integration & Verification.
			6. System Acceptance Verification.

	S3D helps in supporting the improvement of the model through the different stages and the automatic generation of the executables models so that the functional and non-functional constraints can be verified. Architectural mapping, that is, the final mapping of functional components in the PIM to execution resources in the PDM is fixed during System Integration and Verification when an accurate simulation and performance analysis model including the actual code can be generated. This model can provide accurate metrics ensuring final satisfaction of the implementation decided after Design-Space Exploration of as many possibilities as required.		S3D helps in supporting the improvement of the model through the different stages and the automatic generation of the executables models so that the functional and non-functional constraints can be verified. Architectural mapping, that is, the final mapping of functional components in the PIM to execution resources in the PDM is fixed during System Integration and Verification when an accurate simulation and performance analysis model including the actual code can be generated. This model can provide accurate metrics ensuring final satisfaction of the implementation decided after Design-Space Exploration of as many possibilities as required.

Raulgv: /* Detailed Description */

2023-01-16T11:45:29Z

Detailed Description

← Older revision		Revision as of 11:45, 16 January 2023
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	# IT Analysis and Design. At this stage, the analysis and specification of the Platform-Description Model (PDM) can be performed. On the other side, the Platform-Independent Model can be specified.		# IT Analysis and Design. At this stage, the analysis and specification of the Platform-Description Model (PDM) can be performed. On the other side, the Platform-Independent Model can be specified.
	# HW Analysis & Design. At this stage, the design of the initial Platform-Description Model (PDM), can be performed and an initial architecture of nodes and their internal HW architecture can be proposed. The final PDM will be decided later during architectural mapping as part of the System Integration & Verification stage.		# HW Analysis & Design. At this stage, the design of the initial Platform-Description Model (PDM), can be performed and an initial architecture of nodes and their internal HW architecture can be proposed. The final PDM will be decided later during architectural mapping as part of the System Integration & Verification stage.
	# SW Analysis & Design and SW Detailed Design. During this ~~stage~~, the hierarchical partitioning of the PIM in sub-systems and finally, components fully specified in their interfaces and functional and non-functional constraints, is decided.		# SW Analysis & Design and SW Detailed Design. During this stages, the hierarchical partitioning of the PIM in sub-systems and finally, components fully specified in their interfaces and functional and non-functional constraints, is decided.
	# SW Development. The goal of this stage is to develop the code implementing the functional constraints. Papyrus supports both the Modelling and the Development Views and S3D links one with the other by annotating the components with their implementation files using the file’s paths as properties.		# SW Development. The goal of this stage is to develop the code implementing the functional constraints. Papyrus supports both the Modelling and the Development Views and S3D links one with the other by annotating the components with their implementation files using the file’s paths as properties.
	# SW Component Verification. S3D links each component with their Test-Benches so that the component can be verified both in the host (verification) and the target platform (testing) in case it has been decided already and it is available.		# SW Component Verification. S3D links each component with their Test-Benches so that the component can be verified both in the host (verification) and the target platform (testing) in case it has been decided already and it is available.

Raulgv: /* Detailed Description */

2023-01-12T10:58:26Z

Detailed Description

← Older revision		Revision as of 10:58, 12 January 2023
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	S3D covers the modelling and automatic generation of the multi-level executable models used to validate and verify the system at the different abstraction levels. S3D supports the modelling activities at each stage of the V-Cycle for mechatronic systems as explained below:		S3D covers the modelling and automatic generation of the multi-level executable models used to validate and verify the system at the different abstraction levels. S3D supports the modelling activities at each stage of the V-Cycle for mechatronic systems as explained below:

	[[File:wp6-~~25_DD_01~~.png]]		[[File:wp6-26-D-01.png]]

	In all these stages, S3D supports reusability from previous projects as both functional and test-bench components can be imported from libraries:		In all these stages, S3D supports reusability from previous projects as both functional and test-bench components can be imported from libraries:

Raulgv: /* Introduction */

2023-01-11T15:46:07Z

Introduction

← Older revision		Revision as of 15:46, 11 January 2023
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	\| Levels \|\| Tool, Platform		\| Levels \|\| Tool, Platform
	\|-		\|-
	\| Require \|\| Linux Ubuntu 18.04 ~~LTE~~, Eclipse EMF		\| Require \|\| Linux Ubuntu 18.04, Eclipse EMF
	\|-		\|-
	\| Provide \|\| System-of-Systems Modeling		\| Provide \|\| System-of-Systems Modeling

Raulgv: /* Introduction */

2023-01-11T14:15:34Z

Introduction

← Older revision		Revision as of 14:15, 11 January 2023
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	== Introduction ==		== Introduction ==
	{\|class="wikitable"		{\|class="wikitable"
	\| ID\|\| WP6-		\| ID\|\| WP6-25
	\|-		\|-
	\| Contributor \|\| UNICAN		\| Contributor \|\| UNICAN
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	\| Levels \|\| Tool, Platform		\| Levels \|\| Tool, Platform
	\|-		\|-
	\| Require \|\| Linux, Eclipse EMF		\| Require \|\| Linux Ubuntu 18.04 LTE, Eclipse EMF
	\|-		\|-
	\| Provide \|\| ~~Executable system level modeling, automated generation~~ of ~~embedded software, native execution based validation~~		\| Provide \|\| System-of-Systems Modeling
	\|-		\|-
	\| Input \|\| Platform ~~model~~		\| Input \|\| Platform Independent Model, Platform Description Model, Functional code
	\|-		\|-
	\| Output \|\| ~~Code generation~~		\| Output \|\| XML system description & functional code
	\|-		\|-
	\| C4D tooling \|\| n.a.		\| C4D tooling \|\| n.a.
	\|-		\|-
	\| TRL \|\|		\| TRL \|\| 5-6
	\|}		\|}

Raulgv: /* Detailed Description */

2023-01-11T09:56:42Z

Detailed Description

← Older revision		Revision as of 09:56, 11 January 2023
Line 35:		Line 35:

	S3D covers the modelling and automatic generation of the multi-level executable models used to validate and verify the system at the different abstraction levels. S3D supports the modelling activities at each stage of the V-Cycle for mechatronic systems as explained below:		S3D covers the modelling and automatic generation of the multi-level executable models used to validate and verify the system at the different abstraction levels. S3D supports the modelling activities at each stage of the V-Cycle for mechatronic systems as explained below:

	[[File:wp6-25_DD_01.png]]		[[File:wp6-25_DD_01.png]]

Raulgv at 15:33, 10 January 2023

2023-01-10T15:33:10Z

← Older revision		Revision as of 15:33, 10 January 2023
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	== Introduction ==		== Introduction ==
	{\|class="wikitable"		{\|class="wikitable"
	\| ID\|\| WP6-~~HEPSIM2~~		\| ID\|\| WP6-
	\|-		\|-
	\| Contributor \|\| UNICAN		\| Contributor \|\| UNICAN

Raulgv at 13:14, 10 January 2023

2023-01-10T13:14:36Z

← Older revision		Revision as of 13:14, 10 January 2023
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	[[File:wp6-25_IO_01.png]]		[[File:wp6-25_IO_01.png]]

			==References==
			[1] E. Villar, J. Merino, H. Posadas, R. Henia & L. Rioux: “Mega-modeling of complex, distributed, heterogeneous CPS systems”, Microprocessors and Microsystems, V.78, 2020.

			[2] J. Merino, R. Gomez, H. Posadas and E. Villar: "Modeling and Performance Estimation of Robotic Systems using ROS: Application to drone-based Services," in proc. of the Forum on specification & Design Languages (FDL), IEEE, 2021.